Vertical-cavity surface-emitting lasers (VCSELs) using hybrid III-V / Si microcavities and based on double photonic crystal reflectors for the heterogeneous integration on complementary metal-oxide-silicon (CMOS) are demonstrated. High fabrication yield relying on state-of-the-art wafer bonding technology has been achieved. Room-temperature single-mode laser operation at 1.55-µm has been obtained in compact devices (about 3-µm-thick and 15x15 µm2 in lateral area), both in pulsed and continuous-wave regimes, under optical pumping. Thresholds in the sub-mW range have been achieved owing to an optimized management of device optical losses and thermal features.
Corrado Sciancalepore1, Badhise Ben Bakir2, Xavier Letartre1, Nicolas Olivier2, Christian Seassal1, Julie Harduin2, Jean-Marc Fedeli2, and Pierre Viktorovitch1
1Institut des Nanotechnologies de Lyon (INL), UMR 5270, CNRS, Ecole Centrale de Lyon, 36 avenue Guy de Collongue, Ecully, France
2CEA-LETI Minatec, 17 rue des Martyrs, Grenoble, France
Published at 8th IEEE conference, Group IV Photonics 2011, London (14-16 September 2011)
Vertical-cavity surface-emitting lasers (VCSELs)  using hybrid III-V / Si microcavities and based on double photonic crystal  reflectors for the heterogeneous integration on complementary metal-oxide-silicon (CMOS) are demonstrated. High fabrication yield relying on state-of-the-art wafer bonding technology has been achieved. Room-temperature single-mode laser operation at 1.55-µm has been obtained in compact devices (about 3-µm-thick and 15x15 µm2 in lateral area), both in pulsed and continuous-wave regimes, under optical pumping. Thresholds in the sub-mW range have been achieved owing to an optimized management of device optical losses and thermal features.
Devices have been fabricated onto 200-mm silicon-on-insulator (SOI) wafer class with 2-mm-thick buried oxide (BOX) employing processing equipment of a standard CMOS pilot line. Exemplifying cross-section of optically pumped structures along with the top view is given in Fig. 1. An embedded MOVCD-grown multiple-quantum-well active region is placed between two 900-nm-thick SiO2 gaps. The structure is then vertically terminated by a top and bottom Si/SiO2 1-D Photonic Crystal Membrane broadband reflectors (PCMs) characterized with a 50% Si fill-factor, lattice period a and membrane thickness t equal, respectively, to 910 nm and 300 nm. In order to realize a better management of light losses in the cavity, a photonic crystal heterostructure has been introduced in both PCMs through a step function of the silicon slits filling factor as shown in Fig. 1(b). A barrier to the lateral propagation of photons along those directions affected by a higher average group velocity allows to squeeze light in the central well and to perform a massive enhancement of the photonic crystal membrane reflectivity yield. In this way, power-efficient low-threshold CMOS-compatible emitters with a good control over their modal and polarization features are conceivable. The theoretical motivations standing behind such innovative design approach have been extensively covered in our recent communications , .
Fig. 1. Exemplifying sketch of double PCM-VCSEL structures for optical pumping (a) and top-view (b) of heterostructure-confined PCMs.
While 248-nm deep-UV (DUV) lithography and HBr-based reactive ion etching (Hbr-RIE) are required for mirrors fabrication, the integration of III-V semiconductors on SiO2 makes use of a state-of-the-art molecular bonding .
Figure 2 (a, b) shows, respectively, top and cross-sectional views of the bottom 1-D photonic crystal (PC) reflector. The central core of the PCM reflector is bounded laterally with PC areas of different Si filling factor, which act as photonic barriers, insuring an efficient lateral confinement of the VCSEL mode. The excellent molecular bonding yield obtained (well above 95%) is ensured by a good control over III-V epitaxy quality in terms of epitaxial surface defect density and bow as well as environmental contamination on the bonding surface. An optical microscope image of the III-V epitaxy after the bonding performed on a 200-mm SOI processed wafer is shown in Fig. 2(c).
Fig. 2. Top (a) and cross-sectional (b) views of the bottom 1-D PCM reflector. To be noted the good control achieved in terms of vertical silicon slit side walls. (c) A 2” InP-based epitaxy wafer-bonded onto a 200-mm SOI processed wafer showing a fabrication yield above 95%.
First demonstration of room-temperature single-mode laser operation at 1.55-µm has been achieved both in pulsed and continuous-wave regimes, under optical pumping. Thresholds in the sub-mW range are obtained owing to an optimized management of device optical losses and thermal features.
Fig. 3 reports light-in-light-out (LL) curve along with relative above-threshold continuous-wave single-mode emission spectrum of the device with spectral linewidth of 0.6 Å at a pumping power of 1 mW.
Fig. 3. (Left) LL curve of double PCM-VCSEL devices under room-temperature continuous-wave optical pumping. (Right) Emission spectrum of the VCSEL: single-mode operation is observed with threshold powers below 1 mW.
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